Technical Papers Parallel Session-IV: Hardware design and implementation of scalar multiplication in elliptic curve cryptography (ECC) over GF(2163) on FPGA

Abstract/Description

Cryptographic algorithms are widely used for security purposes in embedded systems domain. Hardware implementations of cryptographic algorithms have a significant importance because of maximum security provision. There are various approaches for hardware implementation such as ASICs (Application Specific Integrated Circuits), GPPs (General Purpose Processors) and ASIPs (Application Specific Instruction Set Processors). ASICs provide higher throughput but at the same time they are application specific. GPPs are flexible but they provide limited throughput. There is a design space between throughput and flexibility in both the ASICs and GPPs i.e., to cover this space, ASIPs provide multiple design approaches such as crypto processors, crypto coprocessors and coarse-grain crypto arrays. In this paper we proposed a reconfigurable crypto processor design to compute scalar multiplication operation in elliptic curve cryptography over by using polynomial, basis. Lopez and Dahab scalar multiplication algorithm has been implemented for computation of scalar multiplication. The whole design is simulated and synthesized using Xilinx (ISE-13.4) and implemented on spartan-6 FPGA, XC6SLX16-CSG324 device. The experimental results show that at maximum of 12.5MHz frequency, the targeted device utilizes 1844 slices and 7464 LUTs.

Location

C-9, AMAN CED

Session Theme

Technical Papers Parallel Session-IV (Algorithms)

Session Type

Parallel Technical Session

Session Chair

Dr. Sajjad Haider Zaidi

Start Date

13-12-2015 2:30 PM

End Date

13-12-2015 2:50 PM

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Dec 13th, 2:30 PM Dec 13th, 2:50 PM

Technical Papers Parallel Session-IV: Hardware design and implementation of scalar multiplication in elliptic curve cryptography (ECC) over GF(2163) on FPGA

C-9, AMAN CED

Cryptographic algorithms are widely used for security purposes in embedded systems domain. Hardware implementations of cryptographic algorithms have a significant importance because of maximum security provision. There are various approaches for hardware implementation such as ASICs (Application Specific Integrated Circuits), GPPs (General Purpose Processors) and ASIPs (Application Specific Instruction Set Processors). ASICs provide higher throughput but at the same time they are application specific. GPPs are flexible but they provide limited throughput. There is a design space between throughput and flexibility in both the ASICs and GPPs i.e., to cover this space, ASIPs provide multiple design approaches such as crypto processors, crypto coprocessors and coarse-grain crypto arrays. In this paper we proposed a reconfigurable crypto processor design to compute scalar multiplication operation in elliptic curve cryptography over by using polynomial, basis. Lopez and Dahab scalar multiplication algorithm has been implemented for computation of scalar multiplication. The whole design is simulated and synthesized using Xilinx (ISE-13.4) and implemented on spartan-6 FPGA, XC6SLX16-CSG324 device. The experimental results show that at maximum of 12.5MHz frequency, the targeted device utilizes 1844 slices and 7464 LUTs.